Recently, in order to miniaturize a substrate including an electronic component such as a semiconductor chip, and reduce the amount of space that it occupies, an electronic component such as a semiconductor chip, a so-called electronic component integrated wiring substrate is provided in which an electronic component such as a semiconductor chip is embedded (hereinafter, referred to as an “electronic component integrated substrate”).
As an example of the electronic component integrated substrate, a structure is known in which a second substrate is stacked on a first substrate on which an electronic component such as a semiconductor chip is mounted via substrate connection members such as solder balls, and resin is provided at a space between the first substrate and the second substrate to seal the space. The substrate connection members are provided between pads that are exposed in open portions of a solder resist layer formed at the first substrate, and pads that are exposed in open portions of a solder resist layer formed at the second substrate, respectively.
Here, recently, the substrate connection members are provided with a narrow pitch, and in accordance with this, a clearance between the pads of the first substrate becomes small. Thus, it is difficult to form a wiring pattern between the pads of the first substrate.